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| SN54/74LS353 DUAL 4-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The LSTTL/ MSI SN54/ 74LS353 is a Dual 4-Input Multiplexer with 3-state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH on the respective Output Enable (E0) inputs, allowing the outputs to interface directly with bus oriented systems. It is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all TTL families. DUAL 4-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS LOW POWER SCHOTTKY * * * * Inverted Version of the SN54 / 74LS253 Schottky Process for High Speed Multifunction Capability Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 E0b 15 S0 14 I3b 13 I2b 12 I1b 11 I0b 10 Zb 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 16 1 J SUFFIX CERAMIC CASE 620-09 16 1 N SUFFIX PLASTIC CASE 648-08 1 E0a 2 S1 3 I3a 4 I2a 5 I1a 6 I0a 7 Za 8 GND 16 1 D SUFFIX SOIC CASE 751B-03 PIN NAMES LOADING (Note a) HIGH LOW 0.25 U.L. ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC S0, S1 Multiplexer A E0a I0A - I3a Za Multiplexer B E0b I0b - I3b Zb Common Select Inputs 0.5 U.L. Output Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output (Note b) 0.5 U.L. 0.5 U.L. 65 (25) U.L. 0.25 U.L. 0.25 U.L. 15 (7.5) U.L. LOGIC SYMBOL Output Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output (Note b) 0.5 U.L. 0.5 U.L. 65 (25) U.L. 0.25 U.L. 0.25 U.L. 15 (7.5) U.L. 14 2 1 6 5 4 3 10 11 12 13 15 NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b) The Output LOW drive factor is 7.5 U.L. for Military (54) and 15 U.L. for Commercial (74) Temperature Ranges. The Output HIGH drive factor is 25 U.L. for Military and 65 U.L. for Commercial Temperature Ranges. E0a I0a I1a I2a I3a S0 S1 Za I0b I1b I2b I3b E0b Zb 7 VCC = PIN 16 GND = PIN 8 9 FAST AND LS TTL DATA 5-510 SN54/74LS353 LOGIC DIAGRAM E0b 15 I3b 13 I2b 12 I1b 11 I0b 10 S0 14 S1 2 I3a 3 I2a 4 I1a 5 I0a 6 E0a 1 9 Zb VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 7 Za FUNCTIONAL DESCRIPTION The SN54 / 74LS353 contains two identical 4-input Multiplexers with 3-state outputs. They select two bits from four sources selected by common select inputs (S0, S1). The 4-input multiplexers have individual Output Enable (E0a, E0b) inputs which when HIGH, forces the outputs to a high impedance (high Z) state. The logic equations for the outputs are shown below: Za = E0a * (I0a * S1 * S0 + I1a * S1 * S0 + I2a * S1 * S0 + I3a * S1 * S0) Zb = E0b * (I0b * S1 * S0 + I1b * S1 * S0 + I2b * S1 * S0 + I3b * S1 * S0) If the outputs of 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so that there is no overlap. TRUTH TABLE SELECT INPUTS S0 X L L H H L L H H S1 X L L L L H H H H I0 X L H X X X X X X DATA INPUTS I1 X X X L H X X X X I2 X X X X X L H X X I3 X X X X X X X L H OUTPUT ENABLE E0 H L L L L L L L L OUTPUT Z (Z) H L H L H L H L H = HIGH Level L = LOW Level X = Immaterial (Z) = High Impedance (off) Address inputs S0 and S1 are common to both sections. FAST AND LS TTL DATA 5-511 SN54/74LS353 GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current -- High Output Current -- Low Parameter 54 74 54 74 54 74 54 74 Min 4.5 4.75 -55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 - 1.0 -2.6 12 24 Unit V C mA mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage 54 Output HIGH Voltage 74 Output LOW Voltage QA - QH Output Off Current HIGH Output Off Current LOW Input HIGH Current 0.1 Input LOW Current Short Circuit Current (Note 1) Power Supply Current Total, Output 3-State Total, Output LOW - 20 - 0.4 - 130 14 12 54, 74 74 2.4 3.1 0.25 0.35 0.4 0.5 20 - 20 20 IIH IIL IOS ICC V V V A A A mA mA mA 2.4 - 0.65 3.4 0.8 - 1.5 V V Min 2.0 0.7 V Typ Max Unit V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table IOL = 12 mA IOL = 24 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VOL IOZH IOZL VCC = MAX, VOUT = 2.7 V VCC = MAX, VOUT = 0.4 V VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX mA Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25C, VCC = 5.0 V) Limits Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPLZ tPHZ Parameter Propagation Delay, Data to Output Propagation Delay, Select to Output Output Enable Time to HIGH Level Output Enable Time to LOW Level Output Disable Time to LOW Level Output Disable Time to HIGH Level Min Typ 11 13 20 21 11 15 12 27 Max 25 20 45 32 23 23 27 41 Unit ns ns ns ns ns ns Figure 1 Figure 1 or 2 CL = 15 pF Figures 4, 5 Figures 3, 5 Figures 3, 5 CL = 5.0 pF Figures 4, 5 Test Conditions FAST AND LS TTL DATA 5-512 SN54/74LS353 3-STATE WAVEFORMS VIN 1.3 V tPLH 1.3 V tPHL 1.3 V VIN 1.3 V tPLH 1.3 V tPHL 1.3 V VOUT 1.3 V VOUT 1.3 V Figure 1 Figure 2 VE 1.5 V VE VOUT tPZL 1.5 V 0.5 V 1.5 V tPLZ VE 1.5 V VE tPZH tPHZ 1.5 V VOUT 1.5 V 1.5 V VOL VOH 1.5 V 0.5 V Figure 3 Figure 4 AC LOAD CIRCUIT VCC SWITCH POSITIONS RL SYMBOL tPZH tPZL tPLZ tPHZ SW1 Open Closed Closed Closed SW2 Closed Open Closed Closed SW1 TO OUTPUT UNDER TEST 5.0 k CL* SW2 * Includes Jig and Probe Capacitance. Figure 5 FAST AND LS TTL DATA 5-513 -A- Case 751B-03 D Suffix 16-Pin Plastic SO-16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: MILLIMETER. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. 751B 01 IS OBSOLETE, NEW STANDARD 751B 03. 16 9 -B1 8 P 8 PL 0.25 (0.010) M B M R X 45 G -TD 16 PL 0.25 (0.010) M C SEATING PLANE K T B S M F J A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 3.80 1.35 0.35 0.40 10.00 4.00 1.75 0.49 1.25 INCHES MIN MAX 0.386 0.150 0.054 0.014 0.016 0.393 0.157 0.068 0.019 0.049 1.27 BSC 0.19 0.10 0 5.80 0.25 0.25 0.25 7 6.20 0.50 0.050 BSC 0.008 0.004 0 0.229 0.010 0.009 0.009 7 0.244 0.019 Case 648-08 N Suffix 16-Pin Plastic -A16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: INCH. DIMENSION L" TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B" DOES NOT INCLUDE MOLD FLASH. 5. 6. ROUNDED CORNERS OPTIONAL. 648 01 THRU 07 OBSOLETE, NEW STANDARD 648 08. B 1 8 F S C -TK SEATING PLANE L H G D 16 PL 0.25 (0.010) M J M T A M DIM A B C D F G H J K L M S MILLIMETERS MIN MAX 18.80 6.35 3.69 0.39 1.02 19.55 6.85 4.44 0.53 1.77 INCHES MIN MAX 0.740 0.250 0.145 0.015 0.040 0.770 0.270 0.175 0.021 0.070 2.54 BSC 1.27 BSC 0.21 2.80 7.50 0 0.51 0.38 3.30 7.74 10 1.01 0.100 BSC 0.050 BSC 0.008 0.110 0.295 0 0.020 0.015 0.130 0.305 10 0.040 -A16 9 Case 620-09 J Suffix 16-Pin Ceramic Dual In-Line NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. -B1 8 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. C L 5. 620 01 THRU 08 OBSOLETE, NEW STANDARD 620 09. -TSEATING PLANE K E F D 16 PL 0.25 (0.010) M N G T A S M J 16 PL 0.25 (0.010) M T B S DIM A B C D E F G J K L M N MILLIMETERS MIN MAX 19.05 6.10 19.55 7.36 4.19 0.39 0.53 INCHES MIN MAX 0.750 0.240 0.770 0.290 0.165 0.015 0.021 1.27 BSC 1.40 1.77 0.050 BSC 0.055 0.070 2.54 BSC 0.23 0.27 5.08 7.62 BSC 0 0.39 15 0.88 0.100 BSC 0.009 0.011 0.200 0.300 BSC 0 0.015 15 0.035 FAST AND LS TTL DATA 5-514 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. FAST AND LS TTL DATA 5-515 |
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